Stand-by mode of an electronic circuit

ABSTRACT

A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.

PRIORITY CLAIM

This application claims the priority benefit of French Application forPatent No. 1561202, filed on Nov. 20, 2015, the disclosure of which ishereby incorporated by reference in its entirety to the maximum extentallowable by law.

TECHNICAL FIELD

The present disclosure generally relates to electronic circuits and,more specifically, to the stand-by mode of a microcontroller.

BACKGROUND

In many applications, the electric power consumption of an electroniccircuit is desired to be minimized when the electronic circuit is notused. Stand-by mechanisms, which enable to decrease the circuit powerconsumption, are thus provided.

In electronic circuits comprising a microcontroller, the microcontrollergenerally integrates stand-by functions enabling to set its core tostand-by mode during periods when it is not used. During such stand-byperiods, other circuits of the microcontroller monitor themicrocontroller inputs-outputs to detect a need to wake the core.

SUMMARY

It would be desirable to decrease the residual power consumption of amicrocontroller, including during stand-by periods.

An embodiment overcomes all or part of the disadvantages of usualcircuits for setting a microcontroller to stand-by mode.

An embodiment provides a solution which is easy to implement.

Thus, an embodiment provides a microcontroller comprising: a core; acircuit for managing the core power supply, comprising at least oneinput for receiving an external signal for leaving a stand-by mode; anda signal intercepting circuit configured to intercept said externalsignal and transmit it with a delay to said circuit for managing.

According to an embodiment, said circuit for managing comprises a logicfunction for storing said input signal.

According to an embodiment, said logic function is reset by the circuitfor managing at the end of said delay.

According to an embodiment, said signal intercepting circuit receivesthe output of said logic function and combines it with datarepresentative of the power supply voltage of the microcontroller.

According to an embodiment, said signal intercepting circuit triggers aninterruption when the level of the power supply voltage reaches athreshold.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other features and advantages will be discussed indetail in the following non-limiting description of specific embodimentsin connection with the accompanying drawings, wherein:

FIG. 1 schematically shows an embodiment of a microcontroller;

FIG. 2 is a block diagram showing an embodiment of a circuit for settingthe microcontroller to stand-by mode;

FIG. 3 is a block diagram showing an embodiment of a circuit for wakingthe microcontroller; and

FIGS. 4A, 4B, and 4C illustrate, in the form of timing diagrams, theoperation of the circuit of FIG. 3.

DETAILED DESCRIPTION

The same elements have been designated with the same reference numeralsin the different drawings. In particular, the structural and/orfunctional elements common to the different embodiments may bedesignated with the same reference numerals and may have identicalstructural, dimensional, and material properties. For clarity, onlythose steps and elements which are useful to the understanding of thedescribed embodiments have been shown and will be detailed. Inparticular, the elements present in the microcontroller having itssetting to stand-by mode controlled have not been detailed, thedescribed embodiments being compatible with usual applications. Whenreference is made to terms “about”, “approximately”, or “in the orderof”, this means to within 10%, preferably to within 5%.

FIG. 1 schematically shows an embodiment of a microcontroller 1. In theexample shown in FIG. 1, the microcontroller comprises a core 2 (CORE)and a circuit 4 for restarting or resetting the power supply of core 2.

For simplification, not all the circuits internal to microcontroller 1have been shown. Only the circuits involved in the setting to stand-byand the waking have been shown. In particular, the microcontroller 1comprises volatile and non-volatile storage elements and variouscoprocessors and input-output circuits, which have not been illustrated.Further, the circuit restarting function is considered since, as will beseen hereafter, this function may be a problem. However, circuit 4generally also comprises other power supply control functions.

In a usual solution, on setting to stand-by mode, the power supply ofcore 2 of the microcontroller is stopped. However, the equivalent ofcircuit 4 in the usual solution remains powered to be able to detect aneed for a restart by interpreting inputs-outputs 5 of themicrocontroller.

The described embodiments herein result from a new analysis of the needsof a microcontroller, considering that certain applications do not needa monitoring of their power supply.

Based on this analysis, the power supply monitoring block can then beturned off. However, one of the reasons for which the power supplymonitoring block 4 is generally never turned off is that one must beable to detect a restart due to a drop followed by a rise of the powersupply voltage. In usual solutions, if power supply monitoring block 4is turned off, the system cannot be correctly woken to restart themicrocontroller. In particular, certain logic circuits then takeundetermined states when the power supply rises. The starting of thepower supply detection block can then be prevented by such undeterminedstates. The consequence of adding this ability to stop the power supplymonitoring block would then be to make the starting of themicrocontroller unpredictable (impossible starting according to theundetermined state).

It is provided to add to the microcontroller and, more particularly, toits block for resetting power supply monitoring circuit 4, a stop/startcircuit 3 (SHUTDOWN).

To achieve this, in circuit 4, a function 42 (PM RESET) of restarting orresetting the power supply (Power Management), and thus the system, anda logic function 44 (SB LOGIC) of detecting the stopping/starting offunction 42, are distinguished.

The two functions 42 and 44 of circuit 4 communicate separately withunit 3. Only function 42 communicates with core 2 to wake it up.Function 44 intercepts a wake-up request coming from outside ofmicrocontroller 2 and, instead of transmitting it to circuit 42,transmits it to unit 3 which provides the signal for controlling theresetting or restarting of the power supply of circuit 4 which managesthe power supply of the rest of the product (microcontroller).

Thus, during stand-by periods, only logic block 44 and unit 3 remainactive, which considerably decreases the power consumption.

FIG. 2 schematically shows an embodiment of an interconnection betweenfunctions 42, 44, and 3, highlighting the interception of the logicsignal for resetting block 42 by unit 3.

In this example, logic function 44 is carried out, for each externalresource capable of waking up the microcontroller, by a flip-flop havinga clock input, for example, active on a rising edge, receiving (inputs5) microcontroller reactivation data (for leaving the stand-by state).Output S44 of this flip-flop is processed by unit 3 having an outputactivating the reset (the reactivation) of the power supply by block 42.Once block 42 has restarted, core 2 is active again. A function ofcircuit 3 is to interrupt the output signal of flip-flop 44 to avoid forthe activation of a reset of circuit 42 to cause a reset of theflip-flop (connection 46 between the output of block 42 and the resetinput of the flip-flop).

The number of flip-flops 44 depends on the number of possible wakinginputs 5 of microcontroller 1.

In practice, unit 3 only interrupts the reset signal according to thestate of the power supply. In other words, circuit 3 does not modify thereset signal if the power supply is active but delays it on waking up.

FIG. 3 is a simplified block diagram of an embodiment of unit 3.

According to this embodiment, unit 3 comprises a circuit 32 (SUPPLYMONITORING) for detecting power supply voltage Vdd of themicrocontroller, which thus detects whether power supply function 42 isactive or not. As a specific embodiment, detector 32 comprises a logicinverter 322 powered with voltage Vdd (rails Vdd and GND) applied to themicrocontroller and having its input connected to the junction point ofa resistor 324 and of a diode 326. The value of resistance 324 sets theswitching threshold of inverter 322.

Result S32 of the detection crosses a timer 34 (TIMER) before beingapplied to a first input of an AND-type logic gate 36. The second inputof gate 36 receives output signal S44 of flip-flop 44.

In the case of a plurality of inputs 5, and thus of flip-flops 44, eachflip-flop is associated with a logic gate (in the shown example, asecond gate 36′) having a first input receiving the output of timer 34and having a second input receiving the output (for example, S44′) ofthe concerned flip-flop.

In practice, circuit 42 also includes a function of monitoring powersupply Vdd. However, this function should be accurate for the operationof microcontroller 1, which implies a significant power consumption. Thedetection performed by unit 3 having as only function to mask the stateof the start control signal, which may be undetermined at a very lowvoltage or at the beginning of the powering up, does not need such anaccuracy and may be very simple (and with a low power consumption), asillustrated in FIG. 3.

FIGS. 4A, 4B, and 4C illustrate in timing diagrams the operation of thecircuit of FIG. 3. FIG. 4A shows an example of variation of voltage Vddon waking up. FIG. 4B shows the corresponding shape of signal S32. FIG.4C shows the corresponding shape of output signal S36 of gate 36.

An initial state where voltage Vdd is zero, that is, where the powersupply is stopped (microcontroller at stand-by) is assumed.

At a time t1, voltage Vdd starts increasing, under the effect of awaking of the system (switching of signal 5, FIG. 2). When voltage Vddreaches (time t2) the threshold set by resistor 324 and diode 326,output S32 of inverter 322 copies the value of voltage Vdd. Delay T setby circuit 34 results in that at a subsequent time t3, output S36 ofgate 36 switches to the high state. Indeed, the output of flip-flop 44is in the high state since signal 5 has switched.

Delay T is selected so that the level of voltage Vdd at the end of timeT is higher than the triggering threshold of the reset input of circuit42. Thus, at the end of delay T, when the signal is output by circuit34, voltage Vdd is sufficient for circuit 42 to be immediatelyactivated. The starting of microcontroller power supply managementcircuit 42 thus occurs correctly. Once the voltage is restored bycircuit 42, flip-flop 44 is reset (FIG. 2) and is thus ready to besubsequently restarted.

An advantage of the described embodiments is that they solve thepossible problem of an unknown output state of flip-flop(s) 44 when thesystem is woken.

It is now possible to set power supply block 4 (except for logicfunction 44) to stand-by mode and to wake it when necessary.

Another advantage is that the process of setting to stand-by mode(turning off) need not, in most cases, be modified. Indeed, the resetsystem just needs to have a start/stop control, which is in practicealmost always true.

Another advantage of the described embodiments is that they onlyintroduce a low residual power consumption.

Various embodiments have been described. Various alterations,modifications, and improvements will occur to those skilled in the art.In particular, the number of inputs processed by circuit 3 depends onthe number of microcontroller waking inputs 5. Further, the selection ofthe detection thresholds also depends on the application. Finally, thepractical implementation of the embodiments which have been described iswithin the abilities of those skilled in the art based on the functionalindications given hereabove.

Such alterations, modifications, and improvements are intended to bepart of this disclosure, and are intended to be within the spirit andthe scope of the present invention. Accordingly, the foregoingdescription is by way of example only and is not intended to belimiting. The present invention is limited only as defined in thefollowing claims and the equivalents thereto.

1. A microcontroller, comprising: a core circuit; a circuit for managinga core power supply comprising at least one input for receiving anexternal signal for leaving a stand-by mode; and a signal interceptingcircuit configured to intercept said external signal and transmitting itwith a delay to said circuit for managing.
 2. The microcontroller ofclaim 1, wherein the circuit for managing comprises a logic circuitconfigured to store said input signal.
 3. The microcontroller of claim2, wherein said logic circuit is reset by the circuit for managing atthe end of said delay.
 4. The microcontroller of claim 2, wherein saidsignal intercepting circuit receives the output of said logic circuitand combines it with data representative of a power supply voltage ofthe microcontroller.
 5. The microcontroller of claim 4, wherein saidsignal intercepting circuit triggers an interruption when a level of thepower supply voltage reaches a threshold.
 6. A microcontroller,comprising: a core circuit powered by a power supply; a power managementcircuit configured to reset said power supply in response to a controlsignal; a logic store circuit configured to receive and store a wake-upsignal; a logic gate circuit having a first input configured to receivean output of the logic store circuit and a second input configured toreceive a delay control signal, said logic gate circuit passing theoutput of the logic store circuit as the control signal when the delaycontrol signal is asserted; and a timing circuit configured to generatethe delay control signal in response to a supply voltage exceeding athreshold.
 7. The microcontroller of claim 6, wherein the timing circuitcomprises: a power supply monitoring circuit configured to compare thesupply voltage to the threshold, and a timer circuit configured to delayan output of the power supply monitoring circuit in generating the delaycontrol signal.
 8. The microcontroller of claim 6, wherein said logicstore circuit is reset when the power management circuit reset saidpower supply.
 9. A power supply reset circuit, comprising: a logic storecircuit configured to receive and store a wake-up signal; a logic gatecircuit having a first input configured to receive an output of thelogic store circuit and a second input configured to receive a delaycontrol signal, said logic gate circuit passing the output of the logicstore circuit to generate a wake-up control signal when the delaycontrol signal is asserted; and a timing circuit configured to generatethe delay control signal in response to a supply voltage exceeding athreshold.
 10. The circuit of claim 9, wherein the timing circuitcomprises: a power supply monitoring circuit configured to compare thesupply voltage to the threshold, and a timer circuit configured to delayan output of the power supply monitoring circuit in generating the delaycontrol signal.
 11. The circuit of claim 10, wherein said logic storecircuit is reset after a delay set by said timer circuit expires.